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NXP Semiconductors /LPC43xx /SPI /TCR

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Interpret as TCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RESERVED)RESERVED 0TEST0 (RESERVED)RESERVED

Description

SPI Test Control register. For functional testing only.

Fields

RESERVED

Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined.
TEST

SPI test mode. When 0, the SPI operates normally. When 1, SCK will always be on, independent of master mode select and data availability setting.
RESERVED

Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data